1. Field of Invention
The present invention relates to a semiconductor device in which wires are stacked.
2. Description of the Related Art
In recent years, the degree of integration of semiconductor elements increases for wiring substrates and semiconductor devices, and integration progresses further. This makes wire width narrower and increases the number of wires. Moreover, downsizing of an area of semiconductor devices is attempted by making the wiring into multi-wiring.
As a typical example of a semiconductor element that forms a semiconductor device, a thin film transistor is described with reference to FIGS. 16A to 16C. FIG. 16A is a top view of a thin film transistor and FIGS. 16B and 16C are cross-sectional views taken along lines A-B and C-D of FIG. 16A, respectively. In FIG. 16A, a substrate 101, insulating layers 102, 107, and 115, and a gate insulating layer 104 which are shown in FIGS. 16B and 16C are omitted.
As shown in FIG. 16B, in a thin film transistor 110, a semiconductor region 103 and a gate electrode 105 are insulated by the gate insulating layer 104 and the gate electrode 105 and wires 108 and 109 are insulated by the insulating layer 107. Moreover, a conductive layer 106 is formed at the same time as the gate electrode 105 over the gate insulating layer 104, and the conductive layer 106 and the wire 109 are insulated by the insulating layer 107 interposed therebetween.
Moreover, the wire 108 is connected to one of a source region and a drain region of the semiconductor region 103 through a contact hole 111 formed in the insulating layer 107. Moreover, the wire 109 is connected to the other of the source region and the drain region of the semiconductor region 103 through a contact hole 112 formed in the insulating layer 107. The wire 109 is connected to the conductive layer 106 through a contact hole 113 formed in the insulating layer 107.
Such a structure makes it possible to stack a semiconductor region, a gate electrode, a wire, and the like in a thin film transistor.
As shown in FIG. 16A, each of the wires 108 and 109 is formed so as to have a cross sectional area that is larger than an area of each of the contact holes 111 to 113. In the case of forming the insulating layer 107 by a thin-film formation method such as a CVD method or a sputtering method, a surface of the insulating layer 107 is not flattened and is affected by depression and projection of a layer serving as a base for the insulating layer 107. Thus, depression and projection increase on the surfaces of the wires 108 and 109 and the insulating layer 107, as shown in FIG. 16B.
In a liquid crystal display device, if an element for driving a pixel electrode is formed by using such a thin film transistor, depression and projection of the insulating layer cause an orientation film not to be rubbed uniformly. This causes problems in that orientation of liquid crystals is distorted and accordingly image quality is degraded. Therefore, the insulating layer 115 which has been flattened is formed over the insulating layer 107 and the wires 108 and 109.
As a method for forming the insulating layer 115, a method in which an insulating film formed by a CVD method or a PVD method is flattened by polishing by CMP or the like or a method in which an insulating layer having superior flatness is formed by a coating method is given.
In the case of forming the insulating layer 115 having superior flatness by a coating method, the insulating layer 115 is formed in such a way that a composition that forms the insulating layer is applied by a coating method such as a spin coating method or a slit coating method and then the composition is baked. However, it is necessary to form the insulating layer 115 thick in a depression portion of the insulating layer 107 and the wires 108 and 109 that serve as a base for the insulating layer 115 though the insulating layer 115 may be thin in a projection portion thereof. As a result, as compared with the case of forming an insulating layer over an insulating layer and wires that have little depression and projection difference, the amount of compositions that form the insulating layer 115 increases and material cost increases, as well as the productivity is reduced. Moreover, in the case where the insulating layer 115 is formed with a photosensitive material and light-exposed in later steps, a problem occurs that a light-exposure time extends if the film is thick.
Further, as shown in FIG. 16B, depression and projection difference in a region 116 of the wire 109 where the thick conductive layer 106 overlaps with the insulating layer 107 is larger than in a region 117 of the wire 109 where the insulating layer 107 does not overlap with the conductive layer 106. Thus, uniform application of the composition is interrupted in the regions 116 and 117, resulting in that the film thickness of the insulating layer 115 decreases in the region 116. Accordingly, a problem occurs that a wire formed over the insulating layer 115 is easily short-circuited with the wire 109.